Campuses:
This shows you the differences between two versions of the page.
| Both sides previous revisionPrevious revision | |||
| vetoshield:daq [2013/03/13 18:14] – [Software] wgilbert | vetoshield:daq [2013/05/20 15:44] (current) – [DAQ Overview] wgilbert | ||
|---|---|---|---|
| Line 1: | Line 1: | ||
| ====== Data Acquisition System ====== | ====== Data Acquisition System ====== | ||
| ===== DAQ Overview===== | ===== DAQ Overview===== | ||
| - | Signals from the proportional tubes making up the Veto Shield are conditioned by preamp cards on the ends of the tubes. Conditioned pulses from 16 preamp cards (32 channels) are sent via a Low Voltage Differential Signaling (LVDS) ribbon to a Pulse Stretcher card in a crate in a corner rack. Each crate has a backplane mux that reads up to 8 stretcher cards, or 256 preamp channels. An IRIG time code is distributed to a Symmetricomm timing card in each DAQ computer, which generates clock signals synchronizing timing registers on the mux backplanes connected in its rack. Each time a tube triggers, a timestamped data packet is formed in the mux and transmitted via a multi-pin PCI cable to an NI PCI-6534 digital I/O card in the DAQ computer. The data is written immediately to disk. The disk files from the four computers are later read and the data collected in a database for post-processing. | + | Signals from the proportional tubes making up the Veto Shield are conditioned by preamp cards on the ends of the tubes. Conditioned pulses from 16 preamp cards (32 channels) are sent via a Low Voltage Differential Signaling (LVDS) ribbon to a Pulse Stretcher card in a crate in a corner rack. Each crate has a backplane mux that reads up to 8 stretcher cards, or 256 preamp channels. An IRIG time code is distributed to a Symmetricomm timing card in each DAQ computer which generates clock signals, synchronizing timing registers on the mux backplanes connected in its rack. Each time a tube triggers, a timestamped data packet is formed in the mux and transmitted via a multiconductor |