VetoDAQReadData diagram

This vi is where the actual data acquisition from the 6534 cards takes place.

The upper while loop reads the data from the card and writes it to disk at high execution priority. When the DAQ loop is started, a background DAQmx task is configured, and the driver starts transferring U32 integers from the 64MB buffer on the PCI-6534 card through the PCI bus to a RAM buffer using DMA (direct memory access). On a programmed interval(1 sec default) the vi checks the buffer using the Available Samples per Channel DAQmx property node. The reported number is divided by 12 and the integer result is used to read as many groups of 12 U32 integers (trigger packets) as possible. Since it never tries to read anything that isn't already in the buffer, there should never be a timeout. If there is no data to be read, it skips the read operation.

Once read, the trigger packets are written directly to disk unmolested, with only a header and footer added to the file. The current setting for maximum file size is 100MB. Files are automatically created with the loop ID, date, and time in the filename. Details on header information are on the Data Files page.

The data from the periodic buffer read is also saved in a local variable. The lower loop reads the local on a 1 sec interval, calculating trigger rates per channel in it's subvi, Veto Bit Rates, Limit,+Write Inhibit.vi. In addition it tests all channels for time at high rate limit, and time at zero rate. These are used to change the background color of the counter displays, red for high, blue for zero. All the data is passed back to the indicators on the main vi front panel using control references. At high data rates, the counter can't keep up with the data, so it operates in a separate thread, as a non-blocking process at lower execution priority than R/W process in the upper loop. In that case it will occasionally skip a load of data on it's way to disk, but the count rates etc. are only displayed for troubleshooting purposes.